Open AccessUniform and linear variable doping ultra‐thin PSOI LDMOS with n‐type buried layer
Author(s) -
Li Yanfei,
Qiao Ming,
Jiang Yongheng,
Zhou Xin,
Xu Wan,
Zhang Bo
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2013.2220
Subject(s) - ldmos , materials science , doping , layer (electronics) , variable (mathematics) , electronic engineering , optoelectronics , computer science , electrical engineering , mathematics , engineering , composite material , transistor , voltage , mathematical analysis
A novel ultra‐thin partial silicon‐on‐insulator (PSOI) LDMOS with n‐type buried (n‐buried) layer (NBL PSOI LDMOS) is proposed. The new PSOI LDMOS features an n‐buried layer underneath the n‐type drift (n‐drift) region close to the source side, providing a large conductivity region for majority carriers to significantly improve the self‐heating effect. A combination of uniform and linear variable doping (LVD) profile with highly initial concentration is utilised in the n‐drift region, which alleviates the inherent tradeoff between specific on‐resistance ( R on,sp ) and breakdown voltage (BV), as well as achieving low power dissipation. With a 60‐µm n‐drift region length, the NBL PSOI LDMOS obtains a high BV of 940 V with a low maximum temperature ( T max ) of 327 K at a power ( P ) of 1 mW/μm, which is reduced by around 56 K in comparison to the conventional SOI LDMOS using an LVD profile for the n‐drift region (LVD SOI LDMOS). Moreover, R on,sp of the NBL PSOI LDMOS is lower than that of the LVD SOI LDMOS for a wide range of BV from 400 to 900 V.