Open AccessSample‐and‐hold circuit with dynamic switch leakage compensation
Author(s) -
Zou L.,
Pathrose J.,
Chai K.T.C.,
Je M.,
Xu Y.P.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2013.2092
Subject(s) - leakage (economics) , sample and hold , cmos , electronic circuit , electronic engineering , electrical engineering , compensation (psychology) , engineering , psychology , psychoanalysis , economics , macroeconomics
For sample‐and‐hold (S/H) circuits operating at low sampling rate and high temperature, the switch leakage current is one of the major error sources. A S/H circuit with dynamic switch leakage compensation is presented. The proposed leakage current compensation circuit generates switch leakage replicas that track the actual leakages in the sampling switches. A bidirectional current steering circuit allows the switch leakage to be dynamically compensated with the leakage replicas. A prototype S/H circuit is fabricated in a 1 µm silicon‐on‐isolation CMOS technology. Measurement has shown the effectiveness of dynamic leakage current compensation up to 280°C with a maximum 75% leakage reduction.