Open AccessImpact of dynamic variability on the operation of CMOS inverter
Author(s) -
Ioannidis E.G.,
Haendler S.,
Manceau J.P.,
Dimitriadis C.A.,
Ghibaudo G.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2013.1343
Subject(s) - inverter , noise margin , cmos , electronic engineering , noise (video) , voltage , reduction (mathematics) , electrical engineering , computer science , engineering , transistor , mathematics , artificial intelligence , image (mathematics) , geometry
The impact of dynamic variability due to low‐frequency fluctuations on the operation of CMOS inverters, which constitute the basic component of SRAM cell, is investigated. The experimental methodology to characterise the effect of dynamic variability in a CMOS inverter is first established based on fast I–V measurements of the load current following the application of a ramp input voltage V in ( t ). It is shown that, for small ramp rise times, the load current characteristics I DD ( V in ) exhibit a huge sweep‐to‐sweep dispersion due to low‐frequency noise. The impact of such dynamic variability sources on the inverter's output characteristics V out ( V in ) is finally demonstrated, revealing a 20% noise margin reduction for the smallest inverter cell.