Open AccessTwo‐step continuous‐time incremental sigma–delta ADC
Author(s) -
Tao S.,
Rodriguez S.,
Rusu A.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2013.1096
Subject(s) - delta sigma modulation , sigma , computer science , algorithm , control theory (sociology) , mathematics , physics , artificial intelligence , bandwidth (computing) , telecommunications , control (management) , quantum mechanics
A two‐step continuous‐time (CT) incremental sigma–delta (IΣΔ) ADC, which enhances the performance of conventional CT IΣΔ ADCs, is proposed. By pipelining two second‐order CT IΣΔ ADCs, the proposed two‐step architecture can achieve high resolution without sacrificing the conversion rate. Compared to other alternatives, the two‐step CT IΣΔ ADC exhibits the freedom of adjusting its accuracy and speed independently while featuring quite relaxed circuit specifications.