Open AccessTwo‐step incremental analogue‐to‐digital converter
Author(s) -
Chen C.H.,
Zhang Y.,
Jung Y.,
He T.,
Ceballos J.L.,
Temes G.C.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2013.0104
Subject(s) - power (physics) , computer science , converters , electronic engineering , order (exchange) , mathematics , engineering , physics , finance , quantum mechanics , economics
A new incremental ADC (IADC) is proposed which extends the order of a conventional incremental ADC from N to (2 N − 1) by way of a two‐step operation. For a given conversion time, the duration of each step can be optimised. For an N th‐order IADC, the performance is equivalent to that of a (2 N − 1)‐order converter. However, it only needs the same circuitry as the N th‐order one. The new IADC is hence more accurate, and also much more power‐efficient than the conventional ones.