Open AccessComparing techniques for spur reduction in digital bang‐bang PLLs
Author(s) -
Maffezzoni P.,
Marucci G.,
Levantino S.,
Samori C.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2012.4402
Subject(s) - spur , dither , noise reduction , noise (video) , reduction (mathematics) , phase noise , phase locked loop , control theory (sociology) , electronic engineering , computer science , engineering , acoustics , physics , noise shaping , mathematics , artificial intelligence , geometry , structural engineering , control (management) , image (mathematics)
Bang‐bang phase‐locked loops (PLLs) are prone to generate unwanted output spur tones and high noise floor. In this reported work, a spur reduction technique based on dithering is compared to an alternative technique which exploits oscillator intrinsic noise. It is shown how the latter, joined to a proper loop design, allows eliminating unwanted spur tones while yielding a lower noise floor.