Open AccessDual‐metastability FPGA‐based true random number generator
Author(s) -
Wieczorek P.Z.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2012.4126
Subject(s) - random number generation , dual (grammatical number) , metastability , generator (circuit theory) , field programmable gate array , computer science , self shrinking generator , arithmetic , mathematics , topology (electrical circuits) , electronic engineering , computer hardware , electrical engineering , physics , power (physics) , algorithm , engineering , voltage , combinatorics , induction generator , quantum mechanics , art , literature
A novel concept of a true random number generator (TNRG) based on two metastable flip‐flops in a FPGA circuit is introduced. Most of metastable based TRNG solutions are based on the assumption of a D‐latch (flip‐flop) state's uncertainty which is the source of randomness. In the proposed approach direct proximity of the metastable point is not necessary. Difference of the time of response of a pair of nearly metastable flip‐flops lies upon the proposed circuit's principle of operation. It can be implemented in common programmable FPGA or CPLD circuits ensuring randomness quality‐passing NIST, Diehard and Matlab tests.