True random bit generation with time‐delay sampled‐data feedback system

A new true random bit generator circuit which is a time‐delay sampled‐data feedback system is proposed. The differential equation that defines the dynamic behaviour of the circuit is implemented by analogue active and passive components with a digital block that forms the sample and hold delay line as the feedback. A D‐type flip‐flop chain is used on the delayed feedback line due to the feedback signal which is a binary signal. The impressive features of the circuit are the ease of its implementation and the successful statistical analysis results that show its output is random. Furthermore, the reported system is the first true random bit generator using a time‐delay sampled‐data feedback system.