Open AccessHardware thread‐context switching
Author(s) -
Sawalha L.,
Tull M. P.,
Barnes R. D.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2012.2887
Subject(s) - context switch , thread (computing) , computer science , limiting , circuit switching , multiplexing , embedded system , computer hardware , parallel computing , computer network , engineering , operating system , telecommunications , mechanical engineering
Numerous proposals have advanced fine‐grained thread migration as a mechanism to address power, performance, reliability and memory coherence problems. However, exploiting conventional context switch mechanisms carries significant overhead, limiting the granularity of thread movement. Proposed is a novel hardware context switching circuit that enables low‐overhead hardware thread migration between cores in a single‐chip multiprocessor. This switching circuit supports multiple simultaneous thread switches and can store the context of both currently running and time‐multiplexed threads. The circuit drastically reduces the direct cost of context switches.