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Research on Column FPN and Black Level Calibration in Large Array CMOS Image Sensor
Author(s) -
Zhongjie Guo,
Ningmei Yu,
Longsheng Wu
Publication year - 2021
Publication title -
chinese journal of electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.267
H-Index - 25
eISSN - 2075-5597
pISSN - 1022-4653
DOI - 10.1049/cje.2021.02.004
Subject(s) - fixed pattern noise , cmos , image sensor , pixel , cmos sensor , chip , noise (video) , column (typography) , sensor array , piecewise , calibration , dynamic range , electronic engineering , computer science , black box , engineering , artificial intelligence , image (mathematics) , electrical engineering , mathematics , telecommunications , mathematical analysis , statistics , frame (networking) , machine learning
A technical investigation, research and implementation is presented to correct column fixed pattern noise and black level in large array Complementary metal oxide semiconductor (CMOS) image sensor. Through making a comparison among reported solution, and give large array CMOS image sensor design and considerations, according to our previous analysis on non‐ideal factor and error source of piecewise Digital to analog converter (DAC) in multi‐channels, an improving accurate piecewise DAC with adaptive switch technique is developed. The research theory has verified by a high dynamic range and low column Fixed pattern noise (FPN) CMOS image sensor prototype chip, which consisting of 8320×8320 pixel array was designed and fabricated in 55nm CMOS 1P4M standard process. The chip active area is 48mm×48mm with a pixel size of 5.7μm×5.7μm. The measured results achieved a high intrinsic dynamic range of 75dB, a low FPN and black level of 0.06%, a low photo response non‐uniformity of 1.5% respectively, and an excellent raw sample image taken by the prototype sensor.

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