Open AccessA 90nm Passive RFID Tag's Custom Baseband Processor for Subthreshold Operation Below 0.3V
Author(s) -
Shi Weiwei,
Peng Panfeng,
Choy ChiuSing
Publication year - 2017
Publication title -
chinese journal of electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.267
H-Index - 25
eISSN - 2075-5597
pISSN - 1022-4653
DOI - 10.1049/cje.2017.04.006
Subject(s) - baseband , computer science , subthreshold conduction , cmos , processor design , robustness (evolution) , computer hardware , design flow , embedded system , electronic engineering , process variation , clock rate , voltage , electrical engineering , transistor , process (computing) , engineering , biochemistry , chemistry , gene , operating system
In the design of passive Radio frequency (RF) tags' baseband processor, subthreshold timing and wide‐range‐Process, voltage and temperature (PVT) variation problems are the bottlenecks to extend the tag's working range. A sophisticated processor is presented based on the EPC and ISO protocol. Power‐aware ideas are applied to the entire processor, including data link portions. Innovatively, a novel custom ratioed logic style is adopted in critical logic paths to fundamentally speed up the circuit operations at ultra‐low‐voltage. The proposed baseband processor was fabricated in 90nm CMOS, another baseband processor design by regular standard‐cell‐based design flow was also fabricated for comparison. In measurement the proposed design indicates good robustness in wide‐range supply and frequency variation and much more competent for subthreshold operation. It can operate at minimum 0.28V supply with power consumption of 129nW.