Open AccessIllegal Trojan design and detection in asynchronous NULL Convention Logic and Sleep Convention Logic circuits
Author(s) -
Ponugoti Kushal K.,
Srinivasan Sudarshan K.,
Smith Scott C.,
Mathure Nimish
Publication year - 2022
Publication title -
iet computers and digital techniques
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.219
H-Index - 46
eISSN - 1751-861X
pISSN - 1751-8601
DOI - 10.1049/cdt2.12047
Subject(s) - hardware trojan , computer science , asynchronous communication , asynchronous circuit , register transfer level , logic gate , trojan , embedded system , digital electronics
With Cyber warfare, detection of hardware Trojans, malicious digital circuit components that can leak data and degrade performance, is an urgent issue. Quasi‐Delay Insensitive asynchronous digital circuits, such as NULL Convention Logic (NCL) and Sleep Convention Logic, also known as Multi‐Threshold NULL Convention Logic (MTNCL), have inherent security properties and resilience to large fluctuations in temperatures, which make them very alluring to extreme environment applications, such as space exploration, automotive, power industry etc. This paper shows how dual‐rail encoding used in NCL and MTNCL can be exploited to design Trojans, which would not be detected using existing methods. Generic threat models for Trojans are given. Formal verification methods that are capable of accurate detection of Trojans at the Register‐Transfer‐Level are also provided. The detection methods were tested by embedding Trojans in NCL and MTNCL Rivest‐Shamir‐Adleman (RSA) decryption circuits. The methods were applied to 25 NCL and 25 MTNCL RSA benchmarks of various data path width and provided 100% rate of detection.