Open AccessFragmented software‐based self‐test technique for online intermittent fault detection in processors
Author(s) -
Suryasarman Vasudevan Matampu,
Biswas Santosh,
Sahu Aryabartta
Publication year - 2021
Publication title -
iet computers and digital techniques
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.219
H-Index - 46
eISSN - 1751-861X
pISSN - 1751-8601
DOI - 10.1049/cdt2.12003
Subject(s) - fault coverage , computer science , fault detection and isolation , set (abstract data type) , test set , latency (audio) , code coverage , software , built in self test , embedded system , real time computing , artificial intelligence , engineering , operating system , electronic circuit , programming language , electrical engineering , actuator , telecommunications
Abstract Software‐based self‐test (SBST) method is one of the widely used test techniques in processors. SBST scheme provides high fault coverage but incurs long detection latencies in case of intermittent faults (IFs) in online testing mode, due to large size and longer execution time of the test codes. A study of fragmented SBST testing approaches is conducted to select the most efficient fragmented testing strategy. For the selected fragmented SBST method, a reliable set of SBST code fragments with minimal fault detection latency is determined. However, it incurs inconsiderable overall fault coverage drop, compared to the coverage of the complete SBST test code. From experimental results on MIPS Processor, a set of 20 fragments of test tasks with 80% individual fault coverage was observed to have the highest reliability of all sets of fragments. A larger test task (i.e. complete SBST test code) with 96.3% coverage and a test period of 8 ms was replaced by these 20 fragments, which provided an overall coverage of 96% with an individual test period of 0.4 ms, to detect the same set of IFs.