z-logo
open-access-imgOpen Access
Single event transient mitigation techniques for a cross‐coupled LC oscillator, including a single‐event transient hardened CMOS LC‐VCO circuit
Author(s) -
Karthigeyan Arumugam,
Radha Sankararajan,
Manikandan Esakkimuthu
Publication year - 2022
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/cds2.12094
Subject(s) - voltage controlled oscillator , transient (computer programming) , cmos , capacitor , inductor , electronic engineering , electronic oscillator , event (particle physics) , voltage , transient voltage suppressor , electrical engineering , physics , computer science , engineering , quantum mechanics , operating system
Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic circuits in the sub‐100 nm regime in the radiation environment. This study proposes techniques to mitigate SETs in CMOS voltage‐controlled oscillators (VCOs) without affecting the circuit specifications. A circuit asymmetry technique is used for faster recovery of the oscillator in the event of a single event transient (SET) caused by an ion hit. Also, a new SET tolerant inductor capacitor‐voltage controlled oscillator (LC‐VCO) topology is proposed for a radiation environment that shows reduced phase displacement, amplitude displacement, and recovery time. A comparison has been made with various LC‐VCOs that have an inherent rad‐hard capability which proves a significant improvement in SET sensitivity.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here