Open AccessMulti‐precision binary multiplier architecture for multi‐precision floating‐point multiplication
Author(s) -
Tomar Geetam Singh,
George Marcus Llyode,
Tomar Abhineet Singh
Publication year - 2021
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/cds2.12041
Subject(s) - computer science , floating point , single precision floating point format , binary number , multiplication (music) , double precision floating point format , parallel computing , arithmetic , multiplier (economics) , throughput , subtraction , field programmable gate array , computer hardware , algorithm , mathematics , telecommunications , combinatorics , economics , wireless , macroeconomics
Arithmetic logic units (ALUs) are core components of processing devices that perform required arithmetic and logical operations such as multiplication, division, addition, subtraction, and squaring. The multiplication operation is frequently used in ALUs in engineering applications such as signal processing, video processing and image processing for which floating‐point multiplication is an important component. The dynamic range of numbers represented by floating‐point arithmetic is very large compared with that of fixed‐point numbers of the same bit width. A mantissa similarity investigator (MSI)–interfaced multi‐precision binary multiplier architecture is developed and can be used in data‐intensive applications that require variable precision, high throughput and low delay. This architecture can be configured to operate in single‐, double‐, quadruple‐ and octuple‐precision modes for mantissa multiplication according to the IEEE 754 standard for floating‐point numbers. The system produces increased throughput and utilises mantissa similarity to reduce system delay. The system was synthesised for a variety of field‐programmable gate array targets using Xilinx ISE Design Suite 14.7, and performance was simulated using that suite's ISim simulator.