Open AccessFlat-Lying Semiconductor–Insulator Interfacial Layer in DNTT Thin Films
Author(s) -
Min-Cherl Jung,
Matthew R. Leyden,
Gueorgui O. Nikiforov,
Michael V. Lee,
Han Koo Lee,
Tae Joo Shin,
Kazuo Takimiya,
Yabing Qi
Publication year - 2015
Publication title -
acs applied materials and interfaces
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.535
H-Index - 228
eISSN - 1944-8252
pISSN - 1944-8244
DOI - 10.1021/am507528e
Subject(s) - materials science , organic semiconductor , semiconductor , thin film transistor , dielectric , optoelectronics , thin film , insulator (electricity) , transistor , grain boundary , layer (electronics) , nanotechnology , composite material , electrical engineering , microstructure , engineering , voltage
The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.