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Study on lifetime prediction considering fatigue accumulative effect for die‐attach solder layer in an IGBT module
Author(s) -
Lai Wei,
Chen Minyou,
Ran Li,
Xu Shengyou,
Pan Liangming,
Alatise Olayiwola,
Mawby Philip
Publication year - 2018
Publication title -
ieej transactions on electrical and electronic engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.254
H-Index - 30
eISSN - 1931-4981
pISSN - 1931-4973
DOI - 10.1002/tee.22607
Subject(s) - power cycling , insulated gate bipolar transistor , reliability (semiconductor) , physics of failure , temperature cycling , soldering , reliability engineering , die (integrated circuit) , power (physics) , layer (electronics) , power module , engineering , computer science , mechanical engineering , materials science , electrical engineering , thermal , voltage , composite material , physics , quantum mechanics , meteorology
An accurate lifetime model is needed in power electronic systems as a cost‐effective means of improving reliability and performance assessment, which have long been highly desired to reduce the maintenance cost and to make the product more competitive in the market. Die‐attach solder layer fatigue has been identified as one of the root causes of failure of power electronic modules. This paper presents “physics‐of‐failure lifetime model”, which takes fatigue accumulative effect into consideration and can quantify the effect of long‐term small‐temperature cycling to device fatigue life cycle to estimate the lifetime of the power module. First, small Δ T j power cycling tests were designed to obtain the effects of Δ T j on aged and un‐aged modules. They indicated that the traditional lifetime models were not accurate in predicting the lifetime of power modules. Therefore, a new time‐domain crack propagation model based on the cumulative damage in the die‐attach solder layer is proposed, which includes time‐dependent material properties and temperature profiles. Moreover, power cycling experiments and simulations are conducted to demonstrate the method by comparing the number of cycles to failure. © 2018 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

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