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DC–3 GHz low‐noise, flat‐gain‐response, and high‐linearity amplifier
Author(s) -
Yao YinHua,
Fan TongXiu
Publication year - 2017
Publication title -
ieej transactions on electrical and electronic engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.254
H-Index - 30
eISSN - 1931-4981
pISSN - 1931-4973
DOI - 10.1002/tee.22329
Subject(s) - noise figure , wideband , low noise amplifier , amplifier , linearity , materials science , electrical engineering , high electron mobility transistor , transistor , optoelectronics , bandwidth (computing) , voltage , physics , engineering , telecommunications , cmos
This paper describes the design, fabrication, and testing of a DC–3 GHz ultra‐wideband low‐noise amplifier (LNA) using Avago ATF‐54143 enhanced‐mode pseudomorphic high‐electron mobility transistor. Negative feedback network is introduced to ensure unconditional stability of the LNA over the full waveband. Simulation results show that the LNA provides a gain varying between 14.872 and 14.052 dB, a noise figure (NF) of less than 2.2 dB, and voltage standing wave ratios (VSWRs) approaching 2. A high simulated output third‐order intercept point (OIP 3 ) of >30.2 dBm is achieved. In contrast, in 1‐dB bandwidth of DC–3 GHz, the measured gain is nominal at 13.10 dB. The obtained NF changes in a small range of 2–2.178 dB, and the measured VSWRs are no more than 1.64, which are better than obtained from simulation results. At the same time, OIP 3 at 1, 2, and 3 GHz is 30.3, 29.13, and 29.34 dBm, respectively, while the output at the 1‐dB compression point ( P 1 dB ) is 15.43, 14.83, and 14.33 dBm, respectively. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

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