Dead‐time elimination SVPWM of six‐leg inverter | Zendy

Song Chunwei | Zendy; Zhao Rongxiang | Zendy; Zeng Zheng | Zendy; Zhu Minglei | Zendy

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Dead‐time elimination SVPWM of six‐leg inverter

Author(s) -

Song Chunwei,

Zhao Rongxiang,

Zeng Zheng,

Zhu Minglei

Publication year - 2015

Publication title -

ieej transactions on electrical and electronic engineering

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.254

H-Index - 30

eISSN - 1931-4981

pISSN - 1931-4973

DOI - 10.1002/tee.22107

Subject(s) - inverter , pulse width modulation , control theory (sociology) , computer science , dead time , signal (programming language) , modulation (music) , space vector , voltage , sampling (signal processing) , electronic engineering , engineering , mathematics , electrical engineering , physics , telecommunications , artificial intelligence , statistics , control (management) , detector , acoustics , programming language

We present a six‐leg voltage source inverter (VSI) with a single DC link to feed a three‐phase inductive load. The space vector pulse width modulation (SVPWM) of the six‐leg inverter is studied in detail. The novel switching strategy in one sampling period for H bridge is proposed to avoid the 180° phase shift of the PWM signals for upper and lower side switches. Based on the novel switching strategy, a dead‐time elimination SVPWM is proposed, which can be easily implemented on a digital signal processor. Experimental results are presented to demonstrate the validity and features of the proposed novel SVPWM. © 2015 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

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