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Statistical analysis on the effect of capacitance mismatch in a high‐resolution successive‐approximation ADC
Author(s) -
Wakimoto Tsutomu,
Li Hongxing,
Murase Keita
Publication year - 2010
Publication title -
ieej transactions on electrical and electronic engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.254
H-Index - 30
eISSN - 1931-4981
pISSN - 1931-4973
DOI - 10.1002/tee.20625
Subject(s) - capacitor , capacitance , converters , electronic engineering , resolution (logic) , matching (statistics) , computer science , binary number , successive approximation adc , monte carlo method , topology (electrical circuits) , electrical engineering , mathematics , engineering , physics , voltage , artificial intelligence , statistics , arithmetic , electrode , quantum mechanics
This paper describes the statistical analysis of the effect of capacitance mismatch on the accuracy of a high‐resolution successive‐approximation analog‐to‐digital converter (ADC), which employs a split capacitor array to achieve high resolution. An analysis has been made for the following two types of capacitor digital‐to‐analog converters (DACs). One is the capacitor DAC with binary‐weighted capacitor array. The other is that which uses the segmented capacitor array for the upper bits to relax the matching requirement. The analysis was verified using the Monte‐Carlo simulation with capacitance mismatch. This analysis clarifies the required capacitance matching for a given ADC resolution and provides with a guideline for the optimum design. © 2010 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.