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A switched‐capacitor programmable gain amplifier using dynamic element matching
Author(s) -
Wang Jun,
Matsuoka Toshimasa,
Taniguchi Kenji
Publication year - 2007
Publication title -
ieej transactions on electrical and electronic engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.254
H-Index - 30
eISSN - 1931-4981
pISSN - 1931-4973
DOI - 10.1002/tee.20215
Subject(s) - switched capacitor , capacitor , automatic gain control , programmable gain amplifier , amplifier , electronic engineering , cmos , open loop gain , electronic circuit , computer science , sample and hold , sampling (signal processing) , engineering , electrical engineering , voltage , filter (signal processing)
This paper discusses the effect of capacitor mismatch errors on gain accuracy of switched‐capacitor programmable gain amplifier (SC PGA). To improve gain deviations caused by mismatch errors, the dynamic element matching (DEM) algorithm is applied to the SC PGA circuits. It uses digital gain‐control signal to dynamically vary the matched capacitor combinations so that the effective capacitances of the sampling and feedback capacitor arrays are averaged, and thus the gain deviations due to capacitor mismatch errors are eliminated to a significant extent. The distortion caused by mismatch errors shift to certain frequency bands, and could be reduced or removed by subsequent processing such as lowpass filtering. A 4‐bit SC PGA using DEM was designed in 0.25 µm CMOS process with 2.5 V voltage supply, including offset cancellation and clock bootstrapped circuits operating at a sampling frequency of 10 MHz. Test results have indicated that gain deviations due to mismatch errors are substantially reduced. Copyright © 2007 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.