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Register allocation and exhaustive peephole optimization
Author(s) -
Davidson Jack W.,
Fraser Christopher W.
Publication year - 1984
Publication title -
software: practice and experience
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.437
H-Index - 70
eISSN - 1097-024X
pISSN - 0038-0644
DOI - 10.1002/spe.4380140906
Subject(s) - register allocation , computer science , object code , compiler , programming language , code (set theory) , code generation , parallel computing , processor register , optimizing compiler , program optimization , unreachable code , register file , operating system , instruction set , memory address , key (lock) , semiconductor memory , set (abstract data type)
Emerging peephole optimizers can relieve code generators of much case analysis, but delaying code generation decisions requires register allocation algorithms that accept object code instead of the more usual intermediate code. This paper describes two programs that implement such algorithms for a retargetable optimizing compiler. In a machine‐independent fashion, they allocate and assign registers, eliminate common subexpressions (including often‐missed machine‐specific ones), identify dead variables, and define windows for the companion peephole optimizer. Their techniques for handling machine‐specific data should generalize to other optimizations as well.