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Thiazole‐Modified C 3 N 4 Interfacial Layer for Defect Passivation and Charge Transport Promotion in Perovskite Solar Cells
Author(s) -
Wang Lian,
Fu Lin,
Li Bo,
Li Hui,
Pan Lu,
Chang Bohong,
Yin Longwei
Publication year - 2021
Publication title -
solar rrl
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.544
H-Index - 37
ISSN - 2367-198X
DOI - 10.1002/solr.202000720
Subject(s) - passivation , perovskite (structure) , materials science , energy conversion efficiency , optoelectronics , lone pair , chemical physics , nanotechnology , layer (electronics) , chemistry , crystallography , organic chemistry , molecule
Despite the conspicuous achievements in perovskite solar cells (PSCs), further improvement of the power conversion efficiency (PCE) is hindered by substantially detrimental carrier recombination resulting from the high interfacial charge defect density and inferior charge transport kinetics. Herein, an interface engineering strategy is developed to introduce a Lewis base thiophene or thiazole–modified C 3 N 4 layer at the electron transfer layer (ETL)/perovskite interface to constitute a stepwise energy band alignment and passivate defects at interfaces of the perovskite film. Attributed to its well‐matched energy level with TiO 2 and perovskite, the charge extraction efficiency and charge transfer dynamics can be promoted remarkably, greatly inhibiting charge recombination at the interface. Furthermore, thiophene and thiazole can donate the lone pair electrons in S or N atoms to undercoordinated Pb 2+ , which effectively passivates the electronic trap states caused by halogen vacancies, thereby greatly minimizing trap‐assisted nonradiative recombination in the PSCs. Eventually, the thiazole–C 3 N 4 /perovskite‐based devices acquire an outstanding efficiency of 19.23%, supported by an enhanced open‐circuit voltage ( V OC ) of 1.11 V with improved moisture stability. This work provides an avenue for interfacial energy level modulation and defect passivation strategies for a rational interface microstructure design for meliorating the performance of PSCs.