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Nickel Oxide Hole‐Selective Heterocontact for Silicon Solar Cells: Role of SiO x Interlayer on Device Performance
Author(s) -
Nayak Mrutyunjay,
Mandal Sourav,
Pandey Ashutosh,
Mudgal Sapna,
Singh Sonpal,
Komarala Vamsi K.
Publication year - 2019
Publication title -
solar rrl
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.544
H-Index - 37
ISSN - 2367-198X
DOI - 10.1002/solr.201900261
Subject(s) - materials science , non blocking i/o , passivation , nickel oxide , energy conversion efficiency , quantum efficiency , heterojunction , silicon , optoelectronics , carrier lifetime , current density , analytical chemistry (journal) , short circuit , oxide , open circuit voltage , solar cell , layer (electronics) , nanotechnology , voltage , chemistry , electrical engineering , metallurgy , biochemistry , physics , engineering , quantum mechanics , chromatography , catalysis
Carrier‐selective contact‐based silicon heterojunction solar cells are fabricated using nickel oxide (NiO x ) as a hole‐selective layer by thermal evaporation. The highest power conversion efficiency of ≈15.20% with a chemically grown SiO x interlayer is achieved from a Ag/ITO/NiO x /n‐Si/LiF x /Al cell structure in comparison with ≈12.43% without SiO x . The cells without and with the SiO x layer are analyzed by considering crucial parameters for conversion efficiency, such as minority carriers' diffusion lengths, lifetimes, recombination resistance, and density of interface defect states at the NiO x /n‐Si junction, by studying the dark/light current density–voltage, quantum efficiency, impedance, and parallel conductance characteristics. Device analysis provides evidence for the cell's open‐circuit voltage and short‐circuit current enhancement with the SiO x interlayer. This is due to an improvement in minority carrier lifetimes from ≈8.6 to ≈48.27 μs (photo‐conductance decay analysis), which is also estimated from ≈7.45 to ≈49.20 μs by impedance spectra analysis, increased minority carrier diffusion length from ≈171 to ≈952 μm, and decreased rear surface recombination velocity from ≈1106 to ≈170 cm s −1 (quantum efficiency analysis). These investigations reveal that engineering the n‐Si/LiF x interface by the SiO x interlayer is more important than the NiO x /n‐Si interface because of a thin unintentionally grown SiO x layer during NiO x evaporation simultaneously mediating silicon surface passivation.