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Eliminating Overerase Behavior by Designing Energy Band in High‐Speed Charge‐Trap Memory Based on WSe 2
Author(s) -
Liu Chunsen,
Yan Xiao,
Wang Jianlu,
Ding Shijin,
Zhou Peng,
Zhang David Wei
Publication year - 2017
Publication title -
small
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 3.785
H-Index - 236
eISSN - 1613-6829
pISSN - 1613-6810
DOI - 10.1002/smll.201604128
Subject(s) - trap (plumbing) , non volatile memory , flash memory , charge trap flash , flatness (cosmology) , materials science , electron , stack (abstract data type) , charge (physics) , optoelectronics , semiconductor memory , computer science , nanotechnology , electrical engineering , physics , logic gate , computer hardware , engineering , cosmology , quantum mechanics , meteorology , nand gate , programming language
Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge‐trap stack are combined to form a charge‐trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built‐in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state‐of‐the‐art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high‐performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application.