Premium
Vertically Formed Graphene Stripe for 3D Field‐Effect Transistor Applications
Author(s) -
Hong Seul Ki,
Bong Jae Hoon,
Cho Byung Jin,
Hwang Wan Sik
Publication year - 2017
Publication title -
small
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 3.785
H-Index - 236
eISSN - 1613-6829
pISSN - 1613-6810
DOI - 10.1002/smll.201602373
Subject(s) - graphene , materials science , etching (microfabrication) , optoelectronics , atomic layer deposition , nand gate , nanotechnology , transistor , field effect transistor , layer (electronics) , chemical vapor deposition , logic gate , electronic engineering , electrical engineering , voltage , engineering
A 100‐nm wide, vertically formed graphene stripe (GS) is demonstrated for three‐dimensional (3D) electronic applications. The GS forms along the sidewall of a thin nickel film. It is possible to further scale down the GS width by engineering the deposited thickness of the atomic layer deposition (ALD) Ni film. Unlike a conventional GS or graphene nanoribbon (GNR), the vertically formed GS is made without a graphene transfer and etching process. The process integration of the proposed GS FETs resembles that of currently commercialized vertical NAND flash memory with a design rule of less than 20 nm, implying practical usage of this formed GS for 3D advanced FET applications.