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One‐Step Formation of a Single Atomic‐Layer Transistor by the Selective Fluorination of a Graphene Film
Author(s) -
Ho KuanI,
Liao JiaHong,
Huang ChiHsien,
Hsu ChangLung,
Zhang Wenjing,
Lu AngYu,
Li LainJong,
Lai ChaoSung,
Su ChingYuan
Publication year - 2014
Publication title -
small
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 3.785
H-Index - 236
eISSN - 1613-6829
pISSN - 1613-6810
DOI - 10.1002/smll.201301366
Subject(s) - graphene , materials science , raman spectroscopy , x ray photoelectron spectroscopy , heterojunction , optoelectronics , graphene oxide paper , fabrication , transistor , graphene nanoribbons , nanotechnology , electron mobility , layer (electronics) , semiconductor , chemical engineering , optics , engineering , alternative medicine , medicine , physics , pathology , quantum mechanics , voltage
In this study, the scalable and one‐step fabrication of single atomic‐layer transistors is demonstrated by the selective fluorination of graphene using a low‐damage CF 4 plasma treatment, where the generated F‐radicals preferentially fluorinated the graphene at low temperature (<200 °C) while defect formation was suppressed by screening out the effect of ion damage. The chemical structure of the C–F bonds is well correlated with their optical and electrical properties in fluorinated graphene, as determined by X‐ray photoelectron spectroscopy, Raman spectroscopy, and optical and electrical characterizations. The electrical conductivity of the resultant fluorinated graphene (F‐graphene) was demonstrated to be in the range between 1.6 kΩ/sq and 1 MΩ/sq by adjusting the stoichiometric ratio of C/F in the range between 27.4 and 5.6, respectively. Moreover, a unique heterojunction structure of semi‐metal/semiconductor/insulator can be directly formed in a single layer of graphene using a one‐step fluorination process by introducing a Au thin‐film as a buffer layer. With this heterojunction structure, it would be possible to fabricate transistors in a single graphene film via a one‐step fluorination process, in which pristine graphene, partial F‐graphene, and highly F‐graphene serve as the source/drain contacts, the channel, and the channel isolation in a transistor, respectively. The demonstrated graphene transistor exhibits an on‐off ratio above 10, which is 3‐fold higher than that of devices made from pristine graphene. This efficient transistor fabrication method produces electrical heterojunctions of graphene over a large area and with selective patterning, providing the potential for the integration of electronics down to the single atomic‐layer scale.