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Silicon Nanowire Charge‐Trap Memory Incorporating Self‐Assembled Iron Oxide Quantum Dots
Author(s) -
Huang RuoGu,
Heath James R.
Publication year - 2012
Publication title -
small
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 3.785
H-Index - 236
eISSN - 1613-6829
pISSN - 1613-6810
DOI - 10.1002/smll.201200940
Subject(s) - quantum dot , nanowire , materials science , quantum tunnelling , nanotechnology , charge (physics) , optoelectronics , trap (plumbing) , transistor , silicon , coulomb blockade , non volatile memory , silicon nanowires , voltage , physics , quantum mechanics , meteorology
Charge‐trap non‐volatile memory devices based upon the precise integration of quantum dot storage elements with silicon nanowire field‐effect transistors are described. Template‐assisted assembly yields an ordered array of FeO QDs within the trenches that separate highly aligned SiNWs, and injected charges are reversibly stored via Fowler–Nordheim tunneling into the QDs. Stored charges shift the transistor threshold voltages, providing the basis for a memory device. Quantum dot size is found to strongly influence memory performance metrics.