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Paper No 19.3: Back‐Channel‐Etch Process Flow for a‐IGZO TFTs
Author(s) -
Nag Manoj,
Steudel Soeren,
Chasin Adrian,
Myny Kris,
Rockele Maarten,
Bhoolokam Ajay,
Willegems Myriam,
Smout Steve,
Vicca Peter,
Ameys Marc,
Schols Sarah,
Cheyns David,
Genoe Jan,
van der Steen JanLaurens,
Tempelaars Karin,
Groeseneken Guido,
Heremans Paul
Publication year - 2013
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.83
Subject(s) - amoled , materials science , thin film transistor , optoelectronics , backplane , foil method , threshold voltage , oled , etching (microfabrication) , transistor , active matrix , voltage , electrical engineering , nanotechnology , composite material , engineering , layer (electronics)
In this study, the authors report high‐quality amorphous Indium‐Gallium‐Zinc‐Oxide (a‐IGZO) thin film transistors (TFTs) fabricated using a new back‐channel‐etch (BCE) process flow on Polyethylene Naphthalate (PEN) foil. The BCE flow allows a better scalability of TFTs for high‐resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165 o C in order to ensure good overlay accuracy (< 1µm) on foil. The presented process flow differs from to previously reported by defining the Mo S/D contacts by dry etch prior to a‐IGZO patterning. The TFTs show good electrical performance, including field‐effect mobilities in the range of 15.0cm 2 /(V.s), sub‐threshold slopes of 0.3V/decade and off‐currents <1.0pA on foil. Finally, the applicability of this new BCE process flow was demonstrated for TFT backplane driving a 32 x 32 active‐matrix organic light‐emitting diode (AMOLED) display.