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P‐190: Late‐News‐Poster: Micrometer‐scale Patterning of Self‐assembled SWCNT Films and Thin‐Film Transistors Using Patterned PLL Layer
Author(s) -
Park Boik,
Jang Jongsu,
Kim Hyeonggyu,
Seo Jiseok,
Yoo Hyunjun,
Kim Taehoon,
Hong Yongtaek
Publication year - 2020
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.14341
Subject(s) - micrometer , materials science , layer (electronics) , thin film transistor , fabrication , nanotechnology , transistor , optoelectronics , scale (ratio) , voltage , electrical engineering , optics , engineering , physics , medicine , alternative medicine , pathology , quantum mechanics
We present micrometer‐scale patterning technologies of PLL layer for solution‐processed SWCNT‐TFTs. Our micrometer‐scale patterning technology allowed for fine feature fabrication down to micrometer‐scale. We also demonstrated the TFTs based on the patterned PLL layer for low‐voltage operation.