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P‐195: Late‐News‐Poster: Data Retention in Pixel Drivers Based on Source‐Gated Transistors
Author(s) -
Bestelink Eva,
Dale André,
Sporea Radu A.
Publication year - 2020
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.14147
Subject(s) - pixel , transistor , capacitance , capacitor , thin film transistor , range (aeronautics) , optoelectronics , materials science , computer science , electronic engineering , electrical engineering , engineering , physics , artificial intelligence , nanotechnology , electrode , voltage , layer (electronics) , quantum mechanics , composite material
We have recently demonstrated that, contrary to conventional TFT design rules, emissive pixels based on source‐gated transistor drivers benefit from choosing a source‐gate overlap of several microns. Using TCAD simulations we show that incorporating the SGT overlap capacitance with that of the conventional storage capacitor, pixel area can be optimized, with no adverse impact on data retention. For the technology considered, the optimum source‐gate overlap was 4 ‐ 8 μm, which is in the range of highest operating frequencies for source‐gated transistors.