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P‐5: Compact Modeling of Independent Dual Gate TFTs and OLED for Display Panel Circuit Simulations
Author(s) -
Kang Jiahao,
Guan Ximeng,
Wang Shaowen,
Yuan Ze,
Yu Xiaojun
Publication year - 2020
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.14128
Subject(s) - thin film transistor , capacitance , oled , materials science , spurious relationship , optoelectronics , transistor , voltage , electrical engineering , electronic engineering , computer science , layer (electronics) , physics , engineering , electrode , quantum mechanics , machine learning , composite material
This work presents a universal and comprehensive compact model for three‐ and four‐terminal thin‐film transistors (TFTs). The DC and AC behaviors of TFTs with independent bottom gate or light shield layer are modeled. A threshold‐voltage‐based capacitance model is built to meet the requirements of charge conservation and Gummel capacitance symmetry in order to illuminate spurious voltage shift and current discontinuity that are found in conventional TFT models such as RPI. Stress models are implemented in a stretched‐exponential form. In addition, a compact model for OLED is included in the build.