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48.3: Stress Model Simulation of TFT reliability for G8.6 large‐size TFT‐LCDs
Author(s) -
Mo Qiong-hua,
Cho An-Thung,
Lin Chun-Yan,
Hsu James,
Chen Wade,
Lu York,
Fan Xiao-bin,
Wu Li-feng
Publication year - 2019
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.13557
Subject(s) - thin film transistor , reliability (semiconductor) , transistor , stress (linguistics) , computer science , simulation , engineering , electrical engineering , materials science , layer (electronics) , power (physics) , voltage , composite material , linguistics , physics , philosophy , quantum mechanics
In this paper, Time‐sampling Simulation and lifetime calculation are both used to predict TFT reliability. The thin film transistor can be used to simulate and test the electrical properties of TFT devices according to the parameters measured many times. The simulation obtained by a lot of tests used to simulate and test the key points of TFT. In this way, we substitute the preset working parameters to save time. In this paper, Different insulating layer design of TFT device as an example has been investigated by stress simulation and TFT device lifetime has been predicted.