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P‐70: Resolving Bump Issue on Copper Surface in GI Hole of TFT‐LCDs
Author(s) -
Wang Yijun,
Shen Qiyu,
Wang Jianwei,
Liu Zuhong,
Xu Xufei,
Liu Zhaofan,
Zhang Xiaojie,
Zhang Zhihai,
Youn YangSik,
Chen Junsheng,
Lee SeungKyu
Publication year - 2019
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.13225
Subject(s) - etching (microfabrication) , copper , layer (electronics) , thin film transistor , materials science , flow (mathematics) , optoelectronics , composite material , metallurgy , physics , mechanics
This paper introduces a phenomenon of the SD bump on the gate layer MoNiTi(bottom)/Cu(top) in GI hole because of the worsening of adhesion between SD layer and gate layer after the copper oxides form on the top copper surface of gate layer. We investigated the relationship of the SD bump with TFT array processes and solved the SD bump issue by reducing the power, gas flow ratio (O 2 /SF 6 ) or O.E.(%) time of GI etching process. Because these changes of GI etching parameter can decrease the amount and lower the energy of O* and S* free radical in GI etching chamber.

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