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62‐2: Highly Reliable Shift Register with Coplanar a‐IGZO TFTs by Splitting Top Gate into Dual Gates
Author(s) -
Jeong Duk Young,
Lee Ji Seob,
Chen Yuanfeng,
Lee Suhui,
Jang Jin
Publication year - 2019
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.13062
Subject(s) - materials science , optoelectronics , threshold voltage , thin film transistor , logic gate , amorphous solid , electronic engineering , voltage , electrical engineering , transistor , nanotechnology , chemistry , layer (electronics) , engineering , crystallography
We report the effect of gate splitting on the performance and stability of coplanar amorphous‐Indium‐Gallium‐Zinc‐Oxide (a‐IGZO) TFTs. Splitting gate reduces the threshold voltage (Vth) shift by PBTS (positive bias temperature stress) and improves the performance uniformity. The gate driver made of split gates also shows better performance and stability compared with the conventional single gate shift register