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12.3: 4K‐UHD 3D Display Processing System Based on FPGA
Author(s) -
Lihua GENG,
Chuang WEI,
Xiao ZHANG,
Changlin LENG,
Yanfu LI
Publication year - 2018
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.12659
Subject(s) - field programmable gate array , computer science , computer hardware , frame rate , interface (matter) , frame (networking) , video processing , embedded system , throughput , protocol (science) , computer vision , parallel computing , telecommunications , medicine , alternative medicine , bubble , pathology , maximum bubble pressure method , wireless
BOE 4K‐UHD (Ultra‐High‐Definition, 3840x2160) 3D display processing system based on FPGA (Field Programmable Gate Array) technology, realizes receiving, processing and transmitting of 4K 3D video. In details, 4K 3D video processing functions including interlacing, deinterlacing, stretching, frame rate conversion, mirror image, depth of field adjustment, 2D/3D switching and so on, can be used in the 4K 3D display system. The display system takes advantages of parallel processing architecture based on FPGA device to enhance the ability and efficiency of processing high resolution image, increase the system throughput, which can reach up to 16Gbps, and reduce the system delay, the minimum of which can be within 10ms. Besides, the mainstream video interface protocols including SD/HD/3G‐SDI, DisplayPort 1.2, DVI, are realized in FPGA device without the additional protocol conversion chips. This saves space and power. Additionally, the display system supports various 3D formats, including Side‐by‐Side, Line‐by‐Line, and Dual‐Link. This paper will give a detailed description of the system architecture and key technologies of the display system.