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P‐35: New Narrow Border Freeform LCDs for Automotive Application
Author(s) -
Dai Wenjun,
Wang Meilin,
Tian Fan,
Li Xiongping
Publication year - 2018
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.12158
Subject(s) - mura , pixel , line (geometry) , liquid crystal display , point (geometry) , automotive industry , capacitance , parasitic capacitance , computer science , horizontal line test , electronic engineering , computer hardware , engineering , computer vision , physics , mathematics , geometry , aerospace engineering , operating system , electrode , quantum mechanics
Vertical gate line in pixel array is one effective method to achieve narrow border LCD. However, this design forms V‐shape mura which matches the crossed point positions of the vertical gate line and horizontal gate line, if the pixel array design is not optimized. Through electronic simulation, this paper find out the root cause of the mura is the parasitic capacitance of gate line and data line. The optimum pixel array design is proposed to achieve better image quality of narrow border freeform LCDs for automotive application.

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