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P‐1: Fabrication of a Short‐Channel Oxide TFT Utilizing the Resistance‐Reduction Phenomenon in In‐Ga‐Sn‐O
Author(s) -
Nakata Mitsuru,
Ochi Mototaka,
Tsuji Hiroshi,
Takei Tatsuya,
Miyakawa Masashi,
Fujisaki Yoshihide,
Goto Hiroshi,
Kugimiya Toshihiro,
Yamamoto Toshihiro
Publication year - 2017
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.11870
Subject(s) - passivation , materials science , fabrication , thin film transistor , annealing (glass) , layer (electronics) , optoelectronics , oxide , nanotechnology , composite material , metallurgy , medicine , alternative medicine , pathology
The resistance of an In‐Ga‐Sn‐O (IGTO) film with a SiN x /SiO x passivation layer was found to decrease significantly by thermal annealing, due to hydrogen diffusion from the SiN x layer into the IGTO film through the SiO x layer. We propose a method that utilizes this “resistance‐reduction phenomenon” to reduce the effective channel length in IGTO thin‐film transistors with a SiN x /SiO x passivation layer by the partial formation of a low‐resistance region in the IGTO film. The method is experimentally validated, and we show that even shorter channel lengths can be achieved by employing a SiN x /SiO x layer as an etch‐stop layer.