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7‐3: A Low‐Power and High‐Stable TFT Gate Driver With a Novel Bootstrap Scheme
Author(s) -
Ma Yihua,
Liao Congwei,
Xie Ruibin,
Zhao Qiang,
Zhang Shengdong
Publication year - 2017
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.11565
Subject(s) - feedthrough , power consumption , ripple , power (physics) , gate driver , computer science , electronic engineering , scheme (mathematics) , voltage , electrical engineering , engineering , mathematics , physics , quantum mechanics , mathematical analysis
A novel bootstrap method is proposed, which can significantly reduce the clock feedthrough effect and the dynamic power consumption. An ESL a‐IGZO TFTs based gate driver using this technique is designed. It is shown that the ripple voltage and the power consumption of the proposed driver are only 22.9% and 23.86% of those of the earlier driver.