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69‐2: Oxide‐TFT Mobility Limits and CMOS Feasibility
Author(s) -
Stewart Kevin A.,
Wager John F.
Publication year - 2016
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.10881
Subject(s) - thin film transistor , oxide , cmos , amorphous solid , oxide thin film transistor , materials science , trapping , optoelectronics , mobility model , transistor , electron mobility , semiconductor , amorphous semiconductors , energy (signal processing) , electronic engineering , electrical engineering , computer science , nanotechnology , physics , chemistry , engineering , silicon , telecommunications , crystallography , quantum mechanics , ecology , layer (electronics) , voltage , metallurgy , biology
A physics‐based model for transport in an amorphous semiconductor is developed to estimate the mobility limits of oxide TFTs. The model involves band tail state trapping of a diffusive mobility. Simulation reveals a strong dependence on the Urbach energy. This consideration makes it difficult to realize a highperformance p‐type oxide.