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P‐17: New Gate Driver Circuit for Slim‐Border TFT‐LCD Applications
Author(s) -
Lin Chih-Lung,
Lai Po-Chun,
Lee Ching-En,
Chang Ching-Heng,
Wang Ming-Xun,
Du Yuan-Wei
Publication year - 2016
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.10874
Subject(s) - thin film transistor , gate driver , liquid crystal display , transistor , driver circuit , electrical engineering , threshold voltage , materials science , capacitor , logic gate , signal (programming language) , voltage , waveform , node (physics) , electronic engineering , optoelectronics , computer science , engineering , nanotechnology , layer (electronics) , programming language , structural engineering
This work presents a new gate driver circuit based on hydrogenated amorphous silicon thin‐film transistors (a‐Si:H TFTs) with simple structure for liquid‐crystal displays (LCDs). The circuit uses the capacitors and colck signals to periodically couple the gate node of the driving TFT to a low voltage level to enhance the stability of the presented gate driver circuit. Moreover, the clock signal drives the pull‐down TFT to suppress the threshold voltage shifts. Simulation results verify that the output waveforms are sequential and uniform. Therefore, the presented gate driver circuit is applicable to slim‐bezel TFT‐LCD applications.