Premium
Paper No S12.4: Effect of Plasma Power of Plasma Enhanced Atomic Layer Deposition Process for Gate Insulator Deposition in Top‐Gate Thin‐Film Transistors
Author(s) -
Ko J. B.,
Yeom H. I.,
Hwang C.S.,
Cho S.,
Park S.H. K.
Publication year - 2015
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.10531
Subject(s) - atomic layer deposition , plasma , materials science , deposition (geology) , optoelectronics , layer (electronics) , thin film transistor , transistor , plasma processing , insulator (electricity) , thin film , nanotechnology , electrical engineering , voltage , physics , engineering , paleontology , quantum mechanics , sediment , biology
In this work, plasma enhanced atomic layer deposition process (PEALD) was used for the depositing SiO 2 as the insulating layer with various plasma power. We investigated the effect of plasma power on the TFT performance in top‐gate structure.