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33.1: Invited Paper : A Novel Vertical‐Type Light‐Emitting Transistor and Panel Design on Amorphous Silicon Backplane for High Resolution TV Application
Author(s) -
Hirai Tadahiko,
Bown Mark,
Ueno Kazunori
Publication year - 2015
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.10430
Subject(s) - backplane , materials science , amorphous silicon , optoelectronics , thin film transistor , transistor , silicon , compensation (psychology) , aperture (computer memory) , electrical engineering , engineering , nanotechnology , crystalline silicon , psychology , layer (electronics) , voltage , psychoanalysis , mechanical engineering
We have developed novel vertical‐type transistors (VTs) and vertical‐type light‐emitting transistors (VLTs) using a combination of metal oxide and organic semiconductor materials. We have obtained an ON/OFF ratio =3.7 and Gain =16.7 in the first VT device. We also report pixel and circuit design for a 42″ 4K bottom emission VLT panel on a conventional amorphous silicon (a‐Si) backplane with 60% aperture ratio operated by a novel high speed feedback compensation circuit.