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73.2: A Novel TFT Pixel and Driving Scheme of Electrically‐ Suppressed‐Helix FLC for Active Matrix Flat Panel Display
Author(s) -
Ho Tsz Kin,
Tseng Man Chun,
Srivastava Abhishek,
Zhou Wei,
Lei Lei,
Chigrinov Vladimir G.,
Wong Man,
Kwok Hoi Sing
Publication year - 2015
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.10407
Subject(s) - pixel , grayscale , liquid crystal display , active matrix , flat panel display , helix (gastropod) , pulse width modulation , optics , materials science , thin film transistor , computer science , electronic engineering , optoelectronics , engineering , voltage , physics , electrical engineering , nanotechnology , ecology , layer (electronics) , snail , biology
By recent progress in electrically suppressed helix (ESH) ferroelectric liquid crystal (FLC) mode, a novel pixel design employing pulse width modulated (PWM) grayscale scheme, focusing on TFT flat panel display applications is proposed. Such design has a 3T1C structure, which is compact enough to preserve reasonable pixel aperture in practice. Incorporating an innovative driving scheme, the proposed architecture successfully demonstrates a fully digital and TFT compatible AMFLC pixel architecture, possessing uniform and continuous grayscale. This invention is essential in obtaining ultra‐fast high quality liquid crystal displays, and particularly useful for field‐sequential‐color direct‐view flat‐panel display.