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P‐41: New a‐IGZO TFT Gate Driver Circuit with Threshold Voltage Shift Recovery Driving Scheme
Author(s) -
Lin ChihLung,
Wu ChiaEn,
Lee ChingEn
Publication year - 2015
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/sdtp.10099
Subject(s) - thin film transistor , gate driver , threshold voltage , materials science , transistor , optoelectronics , voltage , power (physics) , electrical engineering , power consumption , logic gate , stress (linguistics) , electronic engineering , engineering , nanotechnology , physics , layer (electronics) , quantum mechanics , linguistics , philosophy
An amorphous indium‐gallium‐zinc oxide thin‐film transistor (a‐IGZO TFT) integrated gate driver with 33% ac driving structure and a new driving scheme for recovering the negative threshold voltage shift (V TH ) is presented. The proposed circuit reduces the power consumption by fully turning off driving TFTs and lowers the gate‐bias stress to prevent severe degradations of TFTs. Furthermore, the negative V TH shift of driving TFT is diminished by applying positive gate‐bias stress. Simulation results illustrate that the proposed gate driver can be successfully operated with depletion‐mode a‐IGZO TFTs and the power consumption is estimated as 274.56 µW under the specification of 5.46‐inch FHD panel.