P‐11: Channel‐Etched CAAC‐OS FETs using Multi‐layer IGZO | Zendy

Shima Yukinori | Zendy; Kanemura Hiroshi | Zendy; Higano Satoshi | Zendy; Hosaka Yasuharu | Zendy; Okazaki Kenichi | Zendy; Koezuka Junichi | Zendy; Matsuda Shinpei | Zendy; Matsubayashi Daisuke | Zendy; Yamazaki Shunpei | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Premium

P‐11: Channel‐Etched CAAC‐OS FETs using Multi‐layer IGZO

Author(s) -

Shima Yukinori,

Kanemura Hiroshi,

Higano Satoshi,

Hosaka Yasuharu,

Okazaki Kenichi,

Koezuka Junichi,

Matsuda Shinpei,

Matsubayashi Daisuke,

Yamazaki Shunpei

Publication year - 2015

Publication title -

sid symposium digest of technical papers

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.351

H-Index - 44

eISSN - 2168-0159

pISSN - 0097-966X

DOI - 10.1002/sdtp.10037

Subject(s) - backplane , stacking , materials science , layer (electronics) , optoelectronics , channel (broadcasting) , thin film transistor , reliability (semiconductor) , transistor , crystal (programming language) , flat panel , electrical engineering , nanotechnology , computer science , chemistry , engineering , voltage , power (physics) , physics , computer graphics (images) , organic chemistry , quantum mechanics , programming language

The improvement in the reliability of a channel‐etched fieldeffect transistor (FET) using a buried channel effect was achieved by stacking In‐Ga‐Zn‐O (IGZO) films with different compositions. In addition, a liquid crystal display panel using an IGZO multilayer c‐axis‐aligned crystal FET for a backplane was fabricated.

This content is not available in your region!

Continue researching here.

Having issues? You can contact us here

Accelerating Research