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A cyclic redundancy check‐based non‐coherent receiver for automatic identification system signals
Author(s) -
Zhou H.,
Ban T.,
Wang J.
Publication year - 2015
Publication title -
international journal of satellite communications and networking
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.388
H-Index - 39
eISSN - 1542-0981
pISSN - 1542-0973
DOI - 10.1002/sat.1116
Subject(s) - computer science , cyclic redundancy check , demodulation , viterbi algorithm , redundancy (engineering) , trellis (graph) , algorithm , bit error rate , viterbi decoder , error detection and correction , network packet , reduction (mathematics) , real time computing , decoding methods , telecommunications , computer network , channel (broadcasting) , mathematics , operating system , geometry
Summary A non‐coherent receiver for automatic identification system (AIS) signals is proposed in this paper. The proposed receiver is based on the Viterbi algorithm with cyclic redundancy check (CRC) trellis. It takes bit stuffing into consideration and is designed to simultaneously demodulate decode and correct the received messages. The complexity of the proposed receiver has been reduced with state‐complexity reduction. Simulations prove that the proposed receiver outperforms those AIS receivers without CRC trellis error correction in terms of BER and packet error rate. Copyright © 2015 John Wiley & Sons, Ltd.