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Bit rate conditions to stabilize an uncertain scalar continuous‐time linear system with clock offset
Author(s) -
Ling Qiang,
Chen Rui,
Dou Rundong
Publication year - 2019
Publication title -
international journal of robust and nonlinear control
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 1.361
H-Index - 106
eISSN - 1099-1239
pISSN - 1049-8923
DOI - 10.1002/rnc.4623
Subject(s) - control theory (sociology) , computer science , offset (computer science) , transmitter , scalar (mathematics) , frequency offset , network packet , lag , real time computing , mathematics , control (management) , telecommunications , computer network , channel (broadcasting) , artificial intelligence , orthogonal frequency division multiplexing , programming language , geometry
Summary This paper aims to stabilize a scalar continuous‐time linear system that transmits its feedback information through a digital communication network. The finite bit rate of the feedback network plays a critical role in the input‐to‐state stability of that system. Stabilizing bit rate conditions depend on not only the system matrix but also the uncertainty of the system matrix and the unknown clock offset between the transmitter (sensor) and the receiver (controller). Compared with the current literature, this paper can handle the system matrix uncertainty and clock offset through implementing an event‐triggered sampling strategy and derive stabilizing conditions that require lower bit rates than those of periodic sampling strategies. Such bit rate saving mainly comes from the fact that our event‐triggered strategy can extract state information from the receive time instants of feedback packets without any extra communication cost. Simulations are done to confirm the effectiveness of the obtained stabilizing bit rate conditions.