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Application of defect simulation as a tool for more efficient failure analysis
Author(s) -
Griep S.,
Khare B.,
Lemme R.,
Papenberg U.,
SchmittLandsiedel D.,
Maly W.,
Walker D. M. H.,
Winnerl J.,
Zettler T.
Publication year - 1994
Publication title -
quality and reliability engineering international
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.913
H-Index - 62
eISSN - 1099-1638
pISSN - 0748-8017
DOI - 10.1002/qre.4680100408
Subject(s) - reliability engineering , process (computing) , very large scale integration , computer science , engineering , embedded system , programming language
In modern VLSI processes, increasing process complexity has resulted in an exponential rise in the costs of thorough failure analysis. In this paper, we present a defect simulation‐based failure analysis methodology, which can be used to significantly reduce both costs and turn‐around time for failure analyses. The methodology is based on the ability to generate a defect dictionary, which can relate defect characteristics to some easily measurable symptoms of defect occurrence.