Premium
Two‐dimensional modelling and characterization of gate‐to‐drain overlap contribution on the leakage current of a MOSFET, used as a GCD
Author(s) -
Ciantar E.,
Burgniard S.,
Jérisian R.,
Oualid J.
Publication year - 1993
Publication title -
quality and reliability engineering international
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.913
H-Index - 62
eISSN - 1099-1638
pISSN - 0748-8017
DOI - 10.1002/qre.4680090417
Subject(s) - mosfet , leakage (economics) , diode , materials science , optoelectronics , characterization (materials science) , electron , electronic engineering , computational physics , electrical engineering , physics , transistor , engineering , nanotechnology , voltage , economics , macroeconomics , quantum mechanics
We have studied the contribution of the gate‐to‐drain overlap on the hot‐carrier induced leakage current of an NMOSFET used as gate‐controlled diode (GCD) after stress. The experimental GCD characteristic is compared to the model obtained by a home‐modified version of MINIMOS. We have introduced an arbitrary or calculated profile of interface states and charges created by hot electrons (models given by C. Hu and P. Roblin, respectively) in order to calculate by fitting their spatial distributions. We have studied also the influence of stress conditions on simulated GCD characteristics.